1. Technical Field
Various embodiments generally relate to a delay locked loop, and more particularly, to a delay locked loop with a shorter tracking time.
2. Related Art
FIG. 1 is a block diagram showing a conventional delay locked loop (DLL). The conventional delay locked loop 10 includes a variable delay line circuit 11 for adjusting a delay time of an input signal iCLK in response to a control signal code and generating an output signal rCLK, a delay model circuit 12 for delaying the output signal rCLK and outputting a feedback signal fbCLK, and a phase comparator circuit 13 for generating the control signal code based on a phase difference between the feedback signal fbCLK from the delay model circuit 12 and the input signal iCLK.
The conventional delay locked loop 10 executes a tracking operation to determine a delay amount of the variable delay line circuit 11 by initially performing several feedback operations. In the conventional delay locked loop 10, the signal rCLK outputted from the variable delay line circuit 11 is delayed by a given time, which is determined by the delay model circuit 12, before being transmitted to the phase comparator circuit 13. Several feedback operations are performed to complete the tracking operation, and the delay of the delay model circuit 12 accumulates as the several feedback operations are performed. As a result, the tracking time increases.